Method for applying a textured insulation layer to a metal layer

ABSTRACT

The present invention relates to a method for applying a structured insulating layer ( 14 ) onto a metal layer ( 12 ), in which insulation material ( 14 ) is applied onto the metal layer ( 12 ), overlayer material ( 16 ) is applied to the insulating layer ( 14 ) and insulating material ( 14 ) and overlayer material ( 16 ) are etched in a plasma etching process, the overlayer material ( 16 ) being structured following the application of insulating layer ( 14 ), and, following the structuring of overlayer material ( 16 ), a plasma etching process is carried out, a structured and planarized insulating layer ( 14 ) being created.

BACKGROUND INFORMATION

[0001] The present invention relates to a method for applying astructured insulating layer onto a metal layer, in which insulationmaterial is applied onto the metal layer, overlayer material is appliedto the insulating layer and insulating material and overlayer materialare etched in a plasma etching process.

[0002] During the manufacturing of integrated circuits, it is frequentlynecessary to apply an insulating layer onto a metal layer. Thisinsulating layer is used for insulating the lower metal layer from anadditional upper metal layer subsequently applied onto the insulatinglayer. For the specific contacting of the metal layers separated by theinsulating layer, before the upper metal layer is applied, contactopenings (Via) are inserted into the insulating layer. An oxide layer(TEOS) is frequently used as an insulating layer, and it is planarizedbefore the application of the upper metal layer. A common way ofintroducing the contact openings into the planarized intermediate layeris an etching method.

[0003]FIG. 3 shows the method steps of a standard method of the relatedart with the aid of cross sectional sketches.

[0004]FIG. 3a, on the left side, shows a substrate 110, on which twostructured metal strips 112 are situated. After the structuring of thisfirst metal layer 112, an oxide layer (TEOS) 114 is deposited, as shownon the right side of FIG. 3a.

[0005]FIG. 3b shows a first lacquering of the device for the purpose ofachieving planarization. The left side of FIG. 3b corresponds to theright side of FIG. 3a. On the right side of FIG. 3b there is a goodplanarization lacquer 116 on oxide layer 114 in order to planarize thesteps in oxide layer 114.

[0006]FIG. 3c shows a first plasma etching process. The left side ofFIG. 3c corresponds to the right side of FIG. 3b. In a plasma etchingmethod, lacquer 116 and oxide layer 114 are etched at approximately thesame etching rate to a specified minimum thickness. Thus is obtainedplanarized oxide layer 114 shown on the right side of FIG. 3c. Theplasma etching process is set, for example by a suitable selection ofthe oxygen concentration, so that the etching rates with respect tolacquer layer 116 and oxide layer 114 are identical to the greatestextent possible. In this manner, in the ideal case, the surface oflacquer layer 116 is imaged on the surface of oxide layer 114.

[0007]FIG. 3d illustrates a second oxide deposit. The left side of FIG.3d corresponds to the right side of FIG. 3c. After the second oxidedeposit, one obtains an overall oxide layer 114, 118, having an at leastapproximately planarized surface.

[0008]FIG. 3e shows a further step for applying a lacquer layer 120. Theleft side of FIG. 3e corresponds to the right side of FIG. 3d. Onaccount of the second lacquering taking place at this point, a lacquerlayer 120 is obtained on oxide layer 114, 118.

[0009]FIG. 3f shows how lacquer layer 120 is structured byphotolithography. Openings 122 are created in lacquer layer 120 from thephotolithography process. The left side of FIG. 3f corresponds to theright side of FIG. 3e. The right side of FIG. 3f shows the end stateafter a photolithographic process, lacquer layer 120 now having openings122, so that oxide layer 114, 118 is partially exposed.

[0010]FIG. 3g shows the first step of the plasma etching process forproducing the contact holes in oxide layer 114, 118. The left side ofFIG. 3g corresponds to the right side of FIG. 3f. Using a firstisotropic plasma etching step, hollows 124 are etched into the surfaceof oxide layer 114, 118 in the area of holes 122 in lacquer layer 120.

[0011]FIG. 3h illustrates a further plasma etching step. On the leftside of FIG. 3h the same situation is shown as on the right side of FIG.3g. The contact holes in oxide layer 114, 118 are etched to completionby an anisotropic etching process, these now consisting of one isotropicpart 124 and one anisotropic part 126.

[0012]FIG. 3i shows that the remaining lacquer layer 120 is removed by aplasma stripping process. The left side of FIG. 3i corresponds to theright side of FIG. 3h. Lacquer 120 is removed by the plasma strippingprocess, so that one obtains as a result an oxide layer 114, 118positioned on a metal layer 112, which has partially flattened contactholes 124, 126. Because of the flattening of the upper hole edge in theregion 124 of contact holes 124, 126, a good edge covering by theadditional upper metal layer deposited later into each of the holes 124,126 is ensured.

[0013] The method shown in FIG. 3 supplies a well planarized insulatinglayer; however, because of the large number of method steps, it is verycostly. The upper hole edge of the contact holes is only partiallyplanarized. In general, one would be afraid that, because of the largenumber of method steps, the probability of defects increases.

SUMMARY OF THE INVENTION

[0014] The present invention builds up on the method of the generic typeaccording to claim 1 in that the overlayer material is structuredsubsequently to its application to the insulating layer, and in thatsubsequently to the structuring of the overlayer material a plasmaetching process is carried out, whereby a structured and planarizedinsulating layer is created. Therefore, according to the presentinvention it is no longer necessary first to carry out a first plasmaetching process after the application of the overlayer material to theinsulating layer, then to rebuild again the oxide layer by a furtheroxide deposit, once more to apply a lacquer layer, and to structure thisfirst, in order to introduce the desired structure into the oxide layer.Rather, it is possible to structure the overlayer material subsequentlyto its application onto the insulating layer, and to produce the desiredstructuring of the insulating layer in the subsequent plasma etchingprocess. In this context it should be observed that the thickness of theoxide layer is sufficiently great before the application of theoverlayer; for example, the thickness might correspond approximately tothe sum of the thickness of the oxide layers separately applied in therelated art.

[0015] Preferably lacquer is involved as far as the overlayer materialis concerned. Lacquers are applied to an oxide layer in a simple manner,and they are especially suitable for representing a mask.

[0016] In this connection it is especially useful if the overlayermaterial is structured by photolithography. Hereby it is possible toproduce the most exact structures, which then positively enter into theprecision of densely packed integrated circuits.

[0017] In the case of the insulating layer, preferably an oxide layer(TEOS) is involved. Oxide layers have come into their own as insulatinglayers in densely packed integrated circuits.

[0018] It may be of advantage if the plasma etching process is carriedout in one step, the ratio of the overlayer material etching rate to theinsulating material etching rate is 1 ±0.4. In the case of such anetching rate ratio and a suitable thickness of the applied layers, onemay succeed in obtaining a desired result in a uniform process, i.e. asingle production step.

[0019] On the other hand it may also be useful if the plasma etchingprocess has several steps, in a first step at least one isotropicdepression being etched into the insulating layer, in a second step atleast one anisotropic depression being etched into the insulating layer,in a third step planarization takes place, and in a fourth step theanisotropic depression is finally etched to form a through hole. In thisway, the contact holes may be formed in particularly controlled fashion.By a suitable selection of the layer thicknesses and the etchingparameters, advantageously rounded contact holes are obtained at theirsurface.

[0020] It may also be useful if the plasma etching process has severalsteps, in a first step the ratio of the overlayer material etching rateto the insulating material etching rate being greater than 1, overlayermaterial primarily being etched and at least one step in the insulatinglayer being defined, in a second step the ratio of the overlayermaterial etching rate to the insulating material etching rate is 1 ±0.4,at least one depression in the insulating layer being etched andplanarization taking place, in a third step the depression is etchedfurther over a fixed period, and in a fourth step the depression isfinally etched to a through hole. Thus, in the first step, first of allremoval of overlayer material is provided, while in the second stepetching of a depression in the insulating layer is begun, by a suitableselection of the ratio of the overlayer material etching rate to theinsulating material etching rate, and planarization is carried out. Inthe third step, the ratio of the etching rates is then no longerdecisively important, but the depression is is etched further over afixed period. In the fourth step, in which the overlayer material mayhave already been completely removed, the etching rate ratio isunimportant, and the only thing that still matters is that the contactholes are etched to completion.

[0021] It may also be useful if the plasma etching process has severalsteps, in a first step the ratio of the overlayer material etching rateto the insulating material etching rate being less than 1, at least onestep in the insulating layer being defined over a fixed period, in asecond step the ratio of the overlayer material etching rate to theinsulating material etching rate is greater than 1, primarily overlayermaterial being etched, in a third step the ratio of the overlayermaterial etching rate to the insulating material etching rate is 1 ±0.4,at least one depression being etched into the insulating layer andplanarization taking place, in a fourth step the depression is furtheretched to a through hole over a fixed period, and in a fifth step thedepression is etched to completion. In this specific embodiment, firstof all a step in the insulating layer is defined over a fixed period,only a small quantity of overlayer material being removed by the plasmaetching process. Thus, to begin with, clearly defined initial conditionsare created for the further etching steps, which leads to especiallyexact results with respect to the surface structure of the insulatinglayer.

[0022] In one particularly advantageous variant of the method accordingto the present invention, the insulating material is applied by aone-time depositing. Even if it is possible, and, depending on therequired quality and thickness of the insulating layer, if it may evenbe useful to undertake the depositing of the insulating material inseveral steps, it is still sometimes preferable, with regard to theeconomics of the method, to deposit the insulating material in onesingle step, in order to reduce the number of method steps.

[0023] Under certain circumstances it may be useful to remove overlayermaterial remaining behind after the plasma etching process by plasmastripping. Thus, with respect to the deposited layer thicknesses and theetching rate ratios, the actual plasma etching process may be arrangedso variably that, even at the end of the plasma etching process, someoverlayer material has still remained on the insulating layer. This isthen removed by plasma stripping.

[0024] The method according to the present invention is then furtherrefined in that an additional, upper metal layer is deposited on thefinished system made of metal layer and insulating layer. The contactholes rounded at the surface are particularly suitable for thedeposition of the additional metal layer, since they ensure goodoverlayer of the edges. Thus, in the final analysis, the method may beused in the production of a frequently needed multi-layer metallizationhaving intermediate insulating layers.

[0025] The present invention is based on the surprising realization thata simplification of the production method may be achieved by thecombination of the planarization process and the etching of the contactholes. Nevertheless, satisfactory results are obtained, particularlywith regard to the shape of the contact holes. Because the number ofmethod steps is decreased in the production of the integrated circuits,the number of defects is reduced, which results in a larger yield. Theshape of the contact holes may be influenced, on the basis of thepresent invention, by the variation of the process parameters, forinstance, the type of lacquer, the way of carrying out thephotolithography, the thickness of the layers and the parameters of theplasma etching process, particularly with respect to the ratio of theetching rates. The desired rounding of the contact holes also results intheir widening. This widening may be compensated by an adjustment of themeasures of the exposure mask used in the lithography, which is used inthe structuring of the resist mask.

BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The present invention shall now be clarified in terms ofpreferred specific embodiments by way of example, with reference to theaccompanying drawings. The figures show:

[0027]FIG. 1 cross sectional sketches of layer sequences which appear ina first specific embodiment of the method according to the presentinvention.

[0028]FIG. 2 cross sectional sketches of layer sequences which appear ina second specific embodiment of the method according to the presentinvention.

[0029]FIG. 3 cross sectional sketches of layer sequences which appear ina method of the related art.

DESCRIPTION OF THE EXEMPLARY EMBODIMENTS

[0030]FIG. 1 illustrates the method steps of a first specific embodimentof the method according to the present invention by various sketchedlayer constructions.

[0031]FIG. 1a shows in cross section a substrate 10 having twostructured metal strips 12. This system shown on the left side of FIG.1a, by oxide deposition, turns into the system shown on the right side,in which an oxide layer 14 is additionally situated on substrate 10 andstructured metal strips 12. Comparison with the correspondingrepresentation in FIG. 3a shows that oxide layer 14 in Figure la has agreater thickness than oxide layer 114 in FIG. 3a. For instance, thethickness of oxide layer 14 may correspond to the sum of the thicknessesof the two deposits of oxide layers in the related art according to FIG.3.

[0032]FIG. 1b shows the application of a lacquer layer 16. The left partof FIG. 1b corresponds to the right part of FIG. 1a. In the right partof FIG. 1b a lacquer layer 16 is shown, in addition to substrate 10,metal strips 12 and oxide layer 14.

[0033] This representation appears again on the left side of FIG. 1c. Asshown in the method according to the present invention, subsequently tothe application of lacquer layer 16, a lithography process is carriedout. This is shown in FIG. 1c. On the right side of FIG. 1c one mayrecognize holes 22 in the lacquer layer, which expose the surface ofoxide layer 14 in certain areas.

[0034]FIG. 1d shows a first step of a plasma etching process. The leftside of FIG. 1d corresponds to the right side of FIG. 1c. First anisotropic etching process takes place, which is selected to be a littleshorter than the isotropic etching process of the related art, explainedin connection with FIG. 3g. The isotropic etching process, as a result,has depressions 24 in the surface of oxide layer 14 in the vicinity ofthrough holes 22 through lacquer layer 16.

[0035] As a further step of the plasma etching process, an anisotropicetching is shown in FIG. 1e. The left side of FIG. 1e corresponds to theright side of FIG. 1d. On the right in FIG. 1e there is additionallyshown an anisotropic depression 26 as the continuation of hollows 24.

[0036]FIG. 1f shows an additional step of the plasma etching process forplanarization and for the further forming of depressions 24, 26 in oxidelayer 14. The left side of FIG. 1 f corresponds to the right side ofFIG. 1e. On the right side of FIG. 1f there is shown a planarized layersequence made up of substrate 10, metal strips 12 and oxide layer 14having depressions 24, 26. It may already be seen that depressions 24,26 are rounded at the surface.

[0037]FIG. 1g shows how the system is etched to completion. The leftside of FIG. 1g corresponds to the right side of FIG. 1f. Depressions24, 26 are further developed by plasma etching in such a way thatthrough holes 28 are created through oxide layer 14 havingadvantageously rounded edges.

[0038] The removal speed of each layer, or rather the ratio of theremoval speeds is essentially a function of the parameters of the plasmaetching process. By suitable selection and modification of theseparameters, the layers may be removed selectively and in a controlledmanner in the various method steps, which in the final analysis improvesthe precision during the production process.

[0039]FIG. 2 shows an example of a multi-step plasma etching process asa part of the method according to the present invention, in which theparameters of the etching process are modified during the method. Theleft side of FIG. 2a corresponds to the left side of FIG. 1d. Theplanarization step shown in FIG. 2a is carried out by plasma etching. Inthis context, the etching parameters are set in such a way thatpreferably lacquer layer 16 is etched. Into oxide layer 14, only a step30 is etched. On the right side of FIG. 2a one may recognize thatlacquer layer 16 has already been substantially removed, whereas in theoxide layer only the slight step 30 is present.

[0040]FIG. 2b now shows how one proceeds further using other etchingparameters. In this connection, the left illustration of FIG. 2bcorresponds to the right illustration in FIG. 2a. Here, the etchingparameters are selected in such a way that the lacquer etching rate isapproximately equivalent to the oxide etching rate. As a result, oneobtains a high degree of planarization and, at the same time, a furtherdevelopment of depressions 30 in oxide layer 14.

[0041]FIG. 2c shows a further step of the plasma etching process. Theleft side of FIG. 2c corresponds to the right side of FIG. 2b.Depressions 30 are further developed by additional etching; the resultis shown on the right side of FIG. 2c. Now the etching rates are nolonger decisive. A fixed time may be set for the method stepcorresponding to FIG. 2c.

[0042] In FIG. 2d, depressions 30 are further developed to becomethrough holes 28. The left side of FIG. 2d corresponds, in this case, tothe right side of FIG. 2c. The finished through hole 28 is shown on theright side of FIG. 2d. The ratio of the etching rate of lacquer layer tooxide layer in this process step is unimportant.

[0043] The layer sequences shown on the right sides of FIG. 1g and FIG.2d form the starting point for applying a further metallizing layer. Thecontact holes rounded at the surface are particularly suitable for thedeposition of the additional metal layer, since they ensure goodcovering of the edges. Thus, in the final analysis, the method may beused in the production of a frequently needed multi-layer metallizationhaving intermediate insulating layers.

[0044] The preceding description of the exemplary embodiments accordingto the present invention is used only for illustrative purposes, and notfor the purpose of limiting the present invention. Various changes andmodifications are possible within the context of the present invention,without departing from the scope of the invention and its equivalents.

what is claimed is:
 1. A method for applying a structured insulatinglayer (14) onto a metal layer (12), in which insulating material (14) isapplied onto the metal layer (12), overlayer material (16) is appliedonto the insulating layer (14) and insulating material (14) and theoverlayer material (16) are etched in a plasma etching process, wherein,the overlayer material (16) is structured subsequently to theapplication onto the insulating layer (14), and subsequently to thestructuring of the overlayer material (16), a plasma etching process iscarried out, a structured and planarized insulating layer (14) beingcreated.
 2. The method as recited in claim 1, wherein, with respect tothe overlayer material (16), lacquer is involved.
 3. The method asrecited in claim 1 or 2, wherein the overlayer material (16) isstructured by photolithography.
 4. The method as recited in one of thepreceding claims, wherein in the case of the insulating layer (14), anoxide layer (TEOS) is involved.
 5. The method as recited in one of thepreceding claims, wherein the plasma etching process is carried out inone step, the ratio of the overlayer material etching rate to theinsulating material etching rate being 1 ±0.4.
 6. The method as recitedin one of the preceding claims, wherein the plasma etching process has aplurality of steps, in a first step at least one isotropic depression(24) being etched into the insulating layer (14), in a second step atleast one anisotropic depression (26) being etched into the insulatinglayer (14), in a third step a planarization taking place and in a fourthstep the anisotropic depression (26) being etched to a completed throughhole (28).
 7. The method as recited in one of the preceding claims,wherein the plasma etching process has a plurality of steps, in a firststep the ratio of the overlayer material etching rate to the insulatingmaterial etching rate being greater than 1, primarily the overlayermaterial (16) being etched, and at least one step (30) being defined inthe insulating layer (14), in a second step the ratio of the overlayermaterial etching rate to the insulating material etching rate being 1±0.4, at least one depression (30) being etched into the insulatinglayer (14) and planarization being carried out, in a third step thedepression (30) being etched further over a fixed period, and in afourth step the depression (30) being etched to a completed through hole(28).
 8. The method as recited in one of the preceding claims, whereinthe plasma etching process has a plurality of steps, in a first step theratio of the overlayer material etching rate to the insulating materialetching rate being less than 1, at least one step being defined in theinsulating layer over a fixed period, in a second step the ratio of theoverlayer material etching rate to the insulating material etching ratebeing greater than 1, primarily overlayer material being etched, in athird step the ratio of the overlayer material etching rate to theinsulating material etching rate being 1 ±0.4, at least one depressionbeing etched into the insulating layer and planarization being carriedout, in a fourth step the depression being etched further over a fixedperiod, and in a fifth step the depression being etched to a completedthrough hole.
 9. The method as recited in one of the preceding claims,wherein the insulating material (14) is applied by a one-timedepositing.
 10. The method as recited in one of the preceding claims,wherein subsequently to the plasma etching process, remaining overlayermaterial (16) is removed by plasma stripping.
 11. The method as recitedin one of the preceding claims, wherein an additional metal layer isapplied onto the finished set-up made up of the metal layer (12) and theinsulating layer (14).